Spinel articles and methods for forming same

ABSTRACT

Single crystal spinel boules, wafers, substrates and active devices including same are disclosed. In one embodiment, such articles have reduced mechanical stress and/or strain represented by improved yield rates.

CROSS-REFERENCE TO RELATED APPLICATION(S) BACKGROUND

1. Field of the Invention

The present invention is generally directed to articles having a spinel crystal structure, and includes articles such as boules, wafers, substrates, and active devices incorporating same. In addition, the present invention relates generally to methods for forming such articles.

2. Description of the Related Art

Active optoelectronic devices, such as light-emitting diodes (LEDs) and laser diodes oftentimes will utilize nitride-based semiconductor layers for the active layer of the device. In this regard, the family of gallium nitride (GaN) materials, which broadly includes Ga(Al, In)N materials, have been utilized as a direct transition-type semiconductor material having a band gap that may be manipulated over a fairly wide range, on the order of about 2 to 6 eV.

In order to take advantage of the optoelectronic characteristics of such nitride-based semiconductor materials, they generally are formed as a single crystal. In this regard, it is generally not pragmatic to form bulk monocrystalline boules of nitride-based semiconductor material. Accordingly, the industry typically has sought to deposit such materials as a monocrystalline layer, such as by epitaxial growth, on an appropriate substrate. It is desired that the substrate on which the nitride-based semiconductor layer is deposited has a compatible crystal structure, to manifest the desired crystal structure in the as-deposited active layer. While such nitride-based materials, such as GaN and AlN can exist in several different crystal states, typically the desired crystal structure is wurtzite rather than zinc blende. In an effort to closely match the desired wurtzite crystal structure, the art has utilized monocrystalline alumina in the form of sapphire (corundum), and specifically oriented the sapphire substrate so as to provide an appropriate crystallographic surface on which the active layer is deposited. However, sapphire suffers from numerous drawbacks. For example, sapphire does not exhibit a cleavage plane that can be used to fabricate active devices. In this regard, it is generally desirable to dice the wafer into individual die (forming active devices, each having a device substrate) by cleavage rather than by slicing or sawing, as cleavage may reduce manufacturing costs and may simplify the manufacturing process.

In contrast, materials having the spinel crystallographic structure, if oriented properly, demonstrate a cleavage plane, the projection of which in the surface of the wafer is generally parallel to a cleavage plane of the nitride active layer, which permits predictable and reliable device fabrication. Despite the technical superiority of spinel over sapphire, a number of processing hurdles exist, resulting in somewhat limited economic feasibility. While the industry has sought to create spinel substrates by a technique known as flame fusion, the so called “Verneuil” technique, such a technique is relatively difficult to carry out, and extremely high processing temperatures have been traced to compositional inhomogeneities in the formed boule.

The industry has also sought to develop single crystalline spinel boules from melt-based process techniques, which include techniques such as the so-called Czochralski technique, among others. In such melt-based techniques, generally a stoichiometric crystal (typically MgO.Al₂O₃, having an MgO:Al₂O₃ ratio of 1:1) is grown from a batch melt, rather than flame-melted that involves solidification on a solid surface. While melt-based techniques have shown much promise for the creation of single-crystal spinel substrates, the process is relatively difficult to control, and suffers from undesirably low yield rates, increasing costs. In addition, extended cooling periods and annealing periods are carried out to remove residual internal mechanical strain and stress present in the boules following boule formation. Such cooling rates may be unusually low, and cooling periods significantly long, affecting throughput and increasing thermal budget and cost. In a similar manner, the extended annealing times, which may range into the hundreds of hours, further increase processing costs.

Still further, even beyond the relatively high processing costs and despite the precautions taken in an attempt to address residual mechanical strain and stress in the crystal, oftentimes the wafers formed from boules tend to suffer from undesirably high failure rates, with frequently lower than 20% yield rates.

In view of the foregoing, it is generally desirable to provide improved spinel boules, wafers, substrates, and optoelectronic devices incorporating same, as well as improved methods for forming same.

SUMMARY

According to a first aspect of the present invention, a single crystal spinel boule is formed by melt processing. The boule has a non-stoichiometric composition and has a reduced mechanical stress. The reduced mechanical stress is represented by a relatively high yield rate, generally not less than about 20%. Yield rate is defined by w_(i)/(w_(i)+w_(f))×100%, where w_(i) equals the number of intact wafers processed from the boule, and w_(f) equals the number of fractured wafers from the boule due to internal mechanical stress or strain in the boule.

According to another aspect of the present invention, a single crystal spinel wafer is formed by melt processing, the wafer having a non-stoichiometric composition and having a reduced internal stress. The reduced internal stress is represented by a yield rate not less than about 20%. Yield rate is defined as above, namely w_(i)/(w_(i)+w_(f))×100%, wherein w_(i) equals the number of intact wafers processed from the boule, and w_(f) equals the number of fractured wafers from the boule due to mechanical stress or strain in the boule.

According to another aspect of the present invention, an optoelectronic substrate is provided, consisting essentially of aMgO.bAl₂O₃ single crystal spinel, wherein a ratio of b:a is greater than 1:1 such that the spinet is rich in Al₂O₃ and the single crystal spinet is formed by a melt process.

According to another aspect, a device is provided, which includes a non-stoichiometric spinet substrate formed by melt processing, and an active layer overlying the substrate.

According to another aspect of the present invention, a method for forming single crystal spinet wafers is provided, which includes providing a batch melt in a crucible, growing a spinet single crystal boule from the melt, restricting annealing to a time period not greater than about 50 hours, and slicing the boule into a plurality of wafers.

According to another aspect of the present invention, a method for forming single crystal spinet wafers is provided, including providing a batch melt in a crucible, growing a single crystal spinet boule from the melt, and slicing the boule into a plurality of wafers. In this embodiment, the boule is grown at a process aspect ratio of not less than about 0.39, the process aspect ratio being defined as a ratio of average boule diameter to crucible inside diameter.

According to another aspect of the present invention, a method for forming single crystal spinet wafers is provided, including providing a batch melt in a crucible, growing a spinel single crystal boule from the melt, cooling the boule at a cooling rate not less than about 50° C./hour, and slicing the boule into a plurality of wafers.

According to another aspect of the present invention, a method for forming single crystal spinet wafers is provided, including providing a batch melt in a crucible, growing a spinet single crystal boule from the melt, cooling the boule at a cooling rate not less than about 50° C./hour, restricting annealing to a time period not greater than about 50 hours, and slicing the boule into a plurality of wafers. During the growing step, the boule is grown at a process aspect ratio of not less than about 0.39, wherein process aspect ratio is defined as a ratio of average boule diameter to crucible inside diameter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a phase diagram of the MgO—Al₂O₃ system.

FIG. 2 is a photograph of a front view of a small diameter (2-inch) boule grown in a 7-inch diameter crucible.

FIG. 3 is a photograph of a front view of a large diameter (4-inch) boule grown in a 7-inch diameter crucible.

FIG. 4 is a photograph of a front view of a 2-inch diameter boule grown in a 4-inch diameter crucible.

FIGS. 5 and 6 are front and side views respectively of a mis-oriented (flipped) crystal.

FIGS. 7 and 8 are front and side view photographs of a good [111] crystal.

FIG. 9 illustrates a wafer having a diameter d, and having numerous device substrates or die.

FIG. 10 illustrates an exemplary optoelectronic device according to an aspect of the present invention.

FIG. 11 shows a process flow diagram according to an aspect of the present invention.

DETAILED DESCRIPTION

According to one aspect of the present invention, a single crystal spinel boule and single crystal spinel wafers formed therefrom are provided. Typically, processing of a single crystal spinel boule begins with the formation of a batch melt in a crucible, generally illustrated as step 210 in FIG. 11. The batch melt is generally provided to manifest a non-stoichiometric composition in the as-formed boule. According to one embodiment, the boule has a general formula of aAD.bE₂D₃, wherein A is selected from the group consisting of Mg, Ca, Zn, Mn, Ba, Sr, Cd, Fe, and combinations thereof, E is selected from the group consisting Al, In, Cr, Sc, Lu, Fe, and combinations thereof, and D is selected from the group consisting O, S, Se, and combinations thereof, wherein a ratio b:a>1:1 such that the spinel is rich in E₂D₃. For clarification, a stoichiometric composition is one in which the ratio of b:a=1:1, while non-stoichiometric compositions have a b:a ratio≠1:1.

As used herein, the term ‘boule’ refers to a single crystal mass formed by melt processing, and includes ingots, cylinders, or the like structures.

According to certain embodiments, A is Mg, D is O and E is Al, such that the single crystal spinel has the formula aMgO.bAl₂O₃. While some of the disclosure contained herein makes reference to the MgO—Al₂O₃ spinel based-compositions, it is understood that the present disclosure more generally relates to a broader group of spinel compositions, having the generalized formula aAD.bE₂D₃, as described above. With respect to the MgO—Al₂O₃ system, attention is drawn to FIG. 1, illustrating a binary phase diagram of MgO—Al₂O₃. As illustrated, as the alumina content of aMgO.bAl₂O₃ increases beyond a ratio of b:a of 1:1 representing the stoichiometric MgO.Al₂O₃ composition, the liquidus temperature decreases. Accordingly, melting may be accomplished at relatively low temperatures. For example, the melt temperature utilized for boule formation in the alumina-rich spinel may be on the order of 50 to 100 degrees lower than the usable melt temperature for stoichiometric spinel. It is noted that stoichiometric spinel having a composition represented by MgO.Al₂O₃ (b:a=1:1) has a liquidus temperature of about 2378 K, while a ratio of b:a of 4:1 as a liquidus temperature notably lower, about 2264K.

While E₂D₃-rich spinels are generally represented by a ratio b:a greater than 1:1, certain embodiments have a b:a ratio not less than about 1.2:1, such as not less than about 1.5:1. Other embodiments have even higher proportions of E₂D₃ relative to AD, such as not less than about 2.0:1, or even not less than about 2.5:1. According to certain embodiments, the relative content of E₂D₃ is limited, so as to have a b:a ratio not greater than about 4:1. Specific embodiments may have a b:a ratio of about 3:1 (e.g., 2.9:1).

Following formation of a batch melt in a crucible, typically, the spinel single crystal boule is formed by one of various techniques such as the Czochralski pulling technique. While the Czochralski pulling technique has been utilized for formation of certain embodiments herein, it is understood that any one of a number of melt-based techniques, as distinct from flame-fusion techniques, may be utilized. Such melt-based techniques also include the Bridgman method, the liquefied encapsulated Bridgman method, the horizontal gradient freeze method, and edge-defined growth method, the Stockberger method, or the Kryopolus method. These melt-based techniques fundamentally differ from flame fusion techniques in that melt-based techniques grow a boule from a melt. In contrast, flame fusion does not create a batch melt from which a boule is grown, but rather, provides a constant flow of solid raw material (such as in powder form) in a fluid, to a hot flame, and the molten product is then projected against a receiving surface on which the molten product solidifies.

Generally, the single seed crystal is contacted with the melt at step 212 in FIG. 11, while rotating the batch melt and the seed crystal relative to each other. Typically, the seed crystal is formed of stoichiometric spinet and has sufficiently high purity and crystallographic homogeneity to provide a suitable template for boule growth. The seed crystal may be rotated relative to a fixed crucible, the crucible may be rotated relative to a fixed seed crystal, or both the crucible and the seed crystal may be rotated. During rotation, the seed crystal and the actively forming boule are drawn out of the melt in step 214 in FIG. 11.

According to one embodiment of a present invention, average boule diameter and interior crucible diameter of the crucible containing the batch melt are controlled to be within certain parameters. Most typically, the single crystal boule is grown at a process aspect ratio of not less than about 0.39. Here, process aspect ratio is defined as a ratio of average boule diameter to crucible diameter. Average boule diameter is the average diameter of the boule along its nominal length, nominal length representing that portion of the boule that is utilized for formation of wafers according to downstream processing steps, generally not including the neck and tail (conical-shaped end caps at opposite ends of the boule). Typically, boule diameter is relatively constant along the nominal length of the boule. Formation at the minimum process aspect ratio helps ensure against unwanted or undesirable crystallographic orientation or re-orientation of the boule, also known as ‘flipping’. More specifically, it is desired that the boule have the <111> orientation (triangular morphology), rather than the <110> orientation (square or hexagonal morphology), and sufficiently high aspect ratios may ensure against flipping from the <111> crystallographic orientation to the <110> crystallographic orientation.

Actual photographs of both desirably oriented <111> boules and “flipped” boules, and the relationship of aspect ratio to crystal orientation, are shown in FIGS. 2–8 and the Table below. FIG. 2 represents a mis-oriented (flipped) single crystal boule formed according to a process aspect ratio of about 0.28 (2 inch boule diameter, 7 inch crucible diameter), while FIGS. 3 and 4 illustrate good <111> single crystal boules formed according to a process aspect ratios of 0.57 (4 inch boule diameter, 7 inch crucible diameter) and 0.50 (2 inch boule diameter, 4 inch crucible diameter). According to embodiments of the present invention, FIGS. 5 and 6 show end and perspective views of another mis-oriented (flipped) boule while FIGS. 7 and 8 illustrate a good <111> single crystal boule.

With respect to the MgO—Al₂O₃ system, multiple samples were created based upon a 3:1 (2.9:1) b:a ratio, and a summary of the relevant process conditions is provided below in the table. Certain embodiments of the present invention have somewhat higher minimum process aspect ratios, such as not less than about 0.40, not less than about 0.42, or even not less than about 0.43. Other embodiments have even higher process aspect ratios such as not less than about 0.44, or even greater.

TABLE Pull rate Crucible ID Crucible lid ID Crystal dia. Result, Aspect (mm/hr) (inches) (inches) (inches) <111> Ratio 1 4 2.5 2.2 yes 0.55 1 5 3.5 2.2 no 0.44 1 6 4.5 2.2 no 0.37 1 7 5.25 2.2 no 0.31 1 7 5.25 4.1 yes 0.59 1 6 4.5 3.1 yes 0.52 2.5 5 3.5 2.2 yes 0.44 2.5 6 4.5 2.2 no 0.37 2.5 7 4 3.1 yes 0.44 2.5 6 2.75 2.2 partly 0.37

Typically, the boule consist essentially of a single spinel phase, with no secondary phases. According to another feature, the boule and the wafers processed therefrom are free of impurities and dopants. According to one embodiment, the wafers are processed into device substrates for optoelectronic applications, the wafer and substrates having a composition consisting essentially of aMgO.bAl₂O₃, wherein a ratio of b:a is greater than 1:1. In this regard, impurities and dopants are generally precluded. For example, Co is restricted from inclusion in the foregoing embodiment, which otherwise is a dopant for Q-switch applications. In contrast to Q-switch applications, it is generally desired that a relatively pure spinel is utilized substantially free of dopants that affect the basic and novel properties of the device substrates.

According to embodiments of the present invention, a single crystal spinel boule is formed having desirable properties. In addition to the desired <111> orientation described above, the boules, wafers, and device substrates formed therefrom also generally have reduced mechanical stress and/or strain, as compared to a stoichiometric articles having a b:a ratio of 1:1. In this regard, embodiments of the present invention provide desirably high yield rates in connection with formation of single crystal wafers that form substrates of active devices, and also provide improved processing features, discussed in more detail hereinbelow.

With respect to improved processing features, the boule may be cooled at relatively high cooling rates such as not less than about 50° C./hour, at step 216 in FIG. 11. Even higher cooling rates may be utilized according to embodiments of the present invention, such as not less than about 100° C./hour, 200° C./hour and even at a rate of greater than about 300° C./hour. The increased cooling rates desirably improve throughput of the fabrication process for forming single crystal boules and further reduce the thermal budget of the entire fabrication, and accordingly reduce costs. Boules formed according to conventional processing generally are cooled at relatively low cooling rates, in an attempt to prevent fracture during the cooling process. However, according to embodiments of the present invention, the cooling rates may be substantially higher yet still provide intact boules in the as-cooled form. Generally, conventional cooling rates are on the order of 40° C./hour or less, requiring cooling periods on the order of days.

Still further, according to another embodiment of the present invention, annealing of the boule, conventionally carried out subsequent to cooling, is restricted to a relatively short time period. Typically, the time period is not greater than about 50 hours, such as not greater than about 30 hours, or even 20 hours. According to certain embodiments, the annealing is restricted to a time period not greater than about 10 hours. Indeed, annealing may be substantially completely eliminated (illustrated by lack of an anneal step in FIG. 11), thereby obviating post-forming heat treatment. In contrast, conventional boule forming technology generally requires use of substantial anneal periods in an attempt to mitigate residual internal stress and strain, responsible for low wafer yield rates as well as boule fracture. Without wishing to be tied to any particular theory, it is believed that the reduction and internal stress and strain in the boule according to embodiments herein permits such flexible processing conditions, including decreased or complete elimination of annealing periods, as well as increased cooling rates as noted above.

According to another feature, the reduction in internal mechanical stress and strain are quantified by yield rate, the number of intact wafers formed by slicing the boule, such as by step 219 in FIG. 11. Typically, slicing is carried out by any one of several slicing techniques, most notably wire sawing. As used herein, yield rate may be quantified by the formula w_(i)/(w_(i)+w_(f))×100%, wherein w_(i)=the number of intact wafers processed from the boule, and w_(f)=the number of fractured wafers from the boule due to internal mechanical stress or strain in the boule. Conventionally, this yield rate is very low, such as on the order 10%. The unacceptably low yield rate is a manifestation of excessive internal stresses and strain in the boule. In contrast, yield rates according to embodiments of the present invention are typically not less than about 25%, 30% or even 40%. Other embodiments show increasingly high yield rates, such as not less than about 50, 60 or even 70%. Indeed, certain embodiments have demonstrated near 100% yield. This reduce internal mechanical stress and/or strain as quantified above is not only present within the as-formed (raw) boules, but also the processed boules, the wafers sliced from boules, and the device substrates cleaved from the wafers. In this regard, the foregoing description of processed boules generally denotes boules that have been subjected to post-cooling machining steps as generally denoted by step 218 in FIG. 11, such as grinding, lapping, polishing and cleaning.

Following slicing, the wafers may be further processed such as by machining at step 220 in FIG. 11. The wafers have a generally sufficient diameter and associated surface area to provide reduced processing costs for the active device manufacturer, in a manner similar that increased wafer size reduces semiconductor die cost in the semiconductor fabrication field. Accordingly, it is generally desired that the wafers have a nominal diameter of not less than about 1.75 inches, generally not less than about 2.0 inches and in certain embodiments, 2.5 inches or greater. Current state-of-the art processing tools for handling wafers in active device fabrication are geared to handle two inch wafers, and processing equipment for handling three inch wafers are presently coming on-line. In this regard, due to processing features and wafer features described herein, next-generation wafers may be supported according to embodiments of the present invention.

FIG. 9 illustrates a wafer according to an embodiment of the present invention, most notably wafer 90 having a plurality of die 92 that form individual device substrates for active devices. As shown, the wafer has a diameter d in accordance with the foregoing description relating to wafer diameter. Typically, the individual device substrates or die 92 are separated from the wafer 90, subsequent to wafer processing, to form individual active devices. In contrast to semiconductor manufacturing in which individual die are typically formed by a sawing operation along kerf lines, the individual active components may be cleaved from the wafer along cleavage planes of the wafer and the overlying active layer, which cleavage planes are generally oriented non-parallel to the plane of the wafer. Generally, the surface of the wafer that is processed has a desirable crystallographic orientation, namely the <111> crystallographic orientation, which is suitable for epitaxial growth of Ga(Al, In)N active materials.

Turning to FIG. 10, an embodiment of an active optoelectronic device is illustrated. The particular optoelectronic device is an LED 100, containing multiple nitride semiconductor layers. LED 100 includes relatively thick n-type GaN HVPE-grown base layer 104 deposited on single crystal spinel device substrate 102 formed according to embodiments herein. The base layer is overlaid by an n-type GaN layer 106, an intermediate (InGa)N active layer 108, and an upper p-type GaN layer 110. The p-type GaN layer 110 has a p-type contact layer 112 formed thereon, and the lower n-type GaN layer 106 has an n-type contact layer 114 formed along a portion of the device. The n-type GaN layer 106 generally forms the active layer of the device. Additional processing and structural details of active optoelectronic devices such as LEDs are known in the art. The reader is directed to U.S. Pat. No. 6,533,874 for additional details related to such devices. While the foregoing embodiment illustrates an LED device, it is understood that the optical, electronic, or optoelectronic active devices may take on various other forms, such as a laser diode.

EXAMPLE

Crucible Charge Preparation: 392.1 g of MgO were combined with 2876.5 g of Al₂O₃ ( aluminum oxide). The raw materials were mixed together and heated for 12 hrs. At 1100 degrees centigrade in ceramic crucible. After cooling, the mixture was transferred into an iridium crucible 100 mm in diameter and 150 mm tall.

Crystal Growth: The iridium crucible with the oxide mixture was placed in standard Czochralski crystal growth station, and heated to the melting point of the oxide mixture by means of radio frequency heating. An inert ambient atmosphere consisting of nitrogen with a small addition of oxygen was used around the crucible.

After the mixture was liquid a small seed crystal of the 1:1 spinel with <111> orientation attached to the pulling rod was used to initiate the start of the crystal growth process. A single crystal boule was grown utilizing the following process conditions, diameter 53 mm, length 150 mm, seed pulling rate 2 mm/hr, seed rotation rate 4 rpm, cool-down time 6 hrs, total time 123 hrs.

After cooling the crystal was visually inspected for bubbles, inclusions or any other visible defects. After visual inspection the top and bottom ends were removed, and crystal was subjected to an x-ray orientation check (Laue diffraction technique). After passing all inspection tests the crystal was used for “bar-stock” preparation.

The foregoing description has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the scope to the precise form or embodiments disclosed, and modifications and variations are possible in light of the above teachings, or may be acquired from practice of embodiments of the invention. 

1. A single crystal spinet boule formed by melt processing, the boule having a non-stoichiometric composition represented by the general formula aAD.bE₂D₃, wherein A is selected from the group consisting of Mg, Ca, Zn, Mn, Ba, Sr, Cd, Fe, and combinations thereof, E is selected from the group consisting Al, In, Cr, Sc, Lu, Fe, and combinations thereof, and D is selected from the group consisting O, S, Se, and combinations thereof, wherein a ratio b:a>2.5:1 such that the spinel is rich in E₂D₃.
 2. The boule of claim 1, having a reduced mechanical stress or strain represented by a yield rate not less than about 20%, wherein yield rate is w_(i)/(w_(i)+w_(f))×100%, w_(i)=the number of intact wafers processed from said boule, and W_(f)=the number of fractured wafers from said boule due to internal mechanical stress or strain in the boule.
 3. The boule of claim 2, wherein the yield rate is not less than about 30%.
 4. The boule of claim 3, wherein the yield rate is not less than about 40%.
 5. A single crystal spinet wafer formed by melt processing, the wafer having a non-stoichiometric composition represented by the general formula aAD.bE₂D₃, wherein A is selected from the group consisting Mg, Ca, Zn, Ba, Sr, Cd, Fe, and combinations thereof, E is selected from the group consisting Al, In, Cr, Sc, Lu, Fe, and combinations thereof, and D is selected from the group consisting O, S, Se, and combinations thereof, wherein a ratio b:a>2.5:1 such that the spinel is rich in E₂D₃.
 6. The single crystal spinel wafer of claim 5, wherein the wafer has a diameter of not less than about 1.75 inches.
 7. The single crystal spinel wafer of claim 5, wherein the wafer has a diameter of not less than about 2.0 inches.
 8. The single crystal spinel wafer of claim 5, wherein the wafer has a diameter of not less than about 2.5 inches.
 9. The single crystal spinel wafer of claim 5, wherein the boule consists essentially of a single spinel phase, with substantially no secondary phases.
 10. The single crystal spinel wafer of claim 5, wherein A is Mg, D is O, and E is Al, such that the single crystal spinel has the formula aMgO.bAl₂O₃.
 11. The single crystal spinel wafer of claim 5, wherein the ratio b:a is about 3:1.
 12. The single crystal spinel wafer of claim 5, wherein the ratio b:a is about 2.9:1.
 13. The single crystal spinel wafer of claim 5, wherein the wafer has a reduced internal stress or strain represented by a yield rate not less than about 20%, wherein yield rate is w_(i)/(w_(i)+w_(f))×100%, w_(i)=the number of intact wafers processed from a boule, and w_(f)=the number of fractured wafers from the boule due to mechanical stress or strain in the boule.
 14. The single crystal spinel wafer of claim 5, wherein the ratio b:a is not greater than about 4:1.
 15. The single crystal spinel wafer of claim 5, wherein the wafer has a lower mechanical stress and strain compared to stoichiometric spinel.
 16. An optoelectronic substrate, consisting essentially of aMgO.bAl₂O₃ single crystal spinel, wherein a ratio b:a>2.5:1 such that the spinel is rich in Al₂O₃, and the single crystal spinel is formed by a melt process.
 17. The substrate of claim 16, wherein the substrate comprises a wafer.
 18. The substrate of claim 16, wherein the substrate comprises a die formed from a wafer.
 19. The substrate of claim 18, wherein the die is cleaved from the wafer.
 20. The substrate of claim 16, wherein the substrate has a surface suitable for epitaxial growth of an active layer thereon. 